Design of Ultra Low Power Integrated PLL using Ring VCO

Abstract

The design of an ultra low power Phase Locked Loop (PLL) is presented in this paper. The proposed PLL consists of a phase detector, a charge pump, low pass filter, and a ring oscillator based voltage controlled oscillator (VCO). The performance of Voltage Controlled Oscillator is of great importance for PLL. The circuit is designed using 0.13µm CMOS technology with the supply voltage of 1V and has a power consumption of 254µW.

Keywords: Charge Pump, CMOS Technology, Low Pass Filter, Phase Detector, Phase Locked Loop, Voltage Controlled Oscillator.