Development of FPGA Based System for Neutron Flux Monitoring in Fast Breeder Reactors

Abstract

The project aims to calculate the frequency of the neutron flux by monitoring the signal from neutron detector from shutdown to full power over 10 decades. This neutron flux signal is input to the FPGA based MODULE. A mathematical relationship has been established between the neutron flux (frequency of the neutrons) and the area under the signal. Variable amplitude and occurrence have been accounted for. White noise has also been added and tested for.  VHDL has been used to simplify the otherwise complicated logic gate design. Mathematical modeling has been used as it is the most accurate of the available methods.

Index Terms --  Neutron flux monitoring, area, pulses