Design of Low Voltage Improved performance Current Mirror

Abstract

This paper proposes a low voltage current mirror circuit with low input impedance and high output impedance. These improvements are obtained by adding an amplifier which provides biasing voltage to the transistors. Its operation and results are compared with conventional and cascode current mirror circuits. The circuits are designed using Tanner EDA Tool in 90nm CMOS technology with 0.8V supply voltage. Simulation results shows that the minimum output voltage is reduced to 0.1 V, also input resistance is reduced to 0.179k? and consumes only 46µW power.

Keywords: Current mirror, Input resistance Output resistance, Input compliance voltage, Output compliance voltage.